TITLE: A Bayesian Based EDA Tool for Accurate VLSI Reliability Evaluations
AUTHORS: Walid Ibrahim and Azam Beg
PUBLICATION/VENUE: 5th International Conference on Innovations in Information Technology (IIT’08), Dec 2008, pp. 101-105. (Acceptance rate: 187/336 = 55.7%).
ABSTRACT:
As the sizes of (nano)device are aggressively scaled deep towards the nanometer regime, the design and manufacturing of future nano-circuits will become extremely complex and inevitably introduce more defects and their functioning will be adversely affected by transient faults. Therefore, accurately calculating the reliability of future designs will become a very important factor for nano-circuit designers as they investigate several design alternatives to optimize the trade-offs between the conflicting metrics of areapower- energy-delay versus reliability. This paper introduces a novel EDA tool (NANO-CR-EDA) for accurate calculation of future nano-circuits reliabilities. Our aim is to provide both educational and research institutions (as well as the semiconductor industry at a later stage) with an accurate and easy to use tool for comparing the reliability of different design alternatives, and for selecting the design that best fits a set of given (design) constraints.
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